2 hrs ago
IIT Delhi Designs India’s First Indigenous Working Micro-GPU
Researchers at IIT Delhi have built a small graphics processor designed in India.
A graphics processor helps computers create images and display information.
The team made its design programmable and tested it on a special FPGA development board.
The micro-GPU could be used in industrial screens, vehicle dashboards, navigation terminals, and e-book readers.
It may help India rely less on GPUs imported from other countries.
The design is still at a demonstration stage rather than being a mass-produced chip.
Researchers want to expand it into an 8–16-core processor.
They also hope to test it as a chip using a 65nm manufacturing process.
IIT Delhi researchers developed and demonstrated what they describe as India’s first indigenous working micro-GPU.
The programmable graphics engine was implemented in Register Transfer Language and mapped to a Spartan-7 FPGA platform.
The architecture is intended for embedded uses including industrial displays, e-rickshaw navigators, and educational e-book readers.
The project could reduce India’s reliance on imported GPUs, which are currently used across modern hardware and AI systems.
Researchers plan an 8–16-core vector-style processor and a potential migration to a 65nm ASIC process node.
- Who
- Researchers in the Electrical Engineering department at the Indian Institute of Technology Delhi, including MTech student Nammi Akash and Professor Kaushik Saha.
- What
- They designed and demonstrated an indigenous programmable micro-GPU for graphics and display processing.
- Where
- At the Indian Institute of Technology Delhi, with the design mapped to a Spartan-7 FPGA platform.
- When
- The achievement was reported on Thursday; the article does not specify a calendar date.
- Why
- To develop affordable indigenous graphics hardware, reduce dependence on imported GPUs, and support embedded applications.
Key facts
- Institution
- Indian Institute of Technology Delhi
- Technology
- Programmable micro Graphics Processing Unit
- Implementation
- Custom floating-point GPU engine written in Register Transfer Language
- Test platform
- Spartan-7 Field Programmable Gate Array
- Potential uses
- Industrial control displays, human-machine interfaces, navigation terminals, dashboards, and e-book readers
- Planned expansion
- An 8–16-core vector-style graphics processor with compiler and graphics software support
- Planned manufacturing path
- Proof-of-concept migration to a 65nm ASIC process node
Quotes
Nammi Akash
MTech student involved in the IIT Delhi micro-GPU project
“The hardware architecture is a scalable programmable graphics processor IP suitable for applications such as industrial control displays, low-cost human-machine interfaces, erickshaw dashboard navigators, inland-water navigation terminals for small fishing boats, educational e-book readers, and other affordable embedded visualization systems.”
rediff.com
“It may be mapped to silicon ASIC or programmable hardware such as FPGAs. Our objective was to create a compact but genuinely programmable graphics-processing architecture suitable for FPGA implementation and future ASIC realization.”
rediff.com
Sources
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